Synopsys (SNPS) FY2025 results: revenue $7.1 billion, up 15.1% on the year

Synopsys sells engineering software spanning silicon design, silicon intellectual property, simulation and analysis, and design services. Its main business is the electronic design automation software engineers use to design and test integrated circuits, alongside software and hardware for validating the electronic systems that carry those chips and the software running on them. It has 189 offices worldwide. There are two reportable segments, Design Automation and Design IP, and revenue is reported in four product groups: EDA, Design IP, Ansys, and Other.

Design Automation

Designing an integrated circuit runs through architecture definition, register transfer level design, functional verification, logic design or synthesis, gate-level verification, floorplanning, place and route, and physical verification, and the EDA products automate those steps. Synopsys Cloud lets customers reach the products in their own cloud environments, and the filing describes an EDA software-as-a-service offering developed in partnership with Microsoft Azure.

The Digital Design Family is the digital implementation flow, and it lets designers plug in internally developed tools and third-party ones. Its products include Fusion Compiler for register transfer level to GDSII implementation, Design Compiler NXT for logic synthesis, IC Compiler II for physical design, Synopsys TestMAX for test and diagnosis, PrimeTime for static timing analysis, PrimePower for power analysis, PrimeLib for library characterisation, StarRC for parasitic extraction, IC Validator for physical verification, and 3DIC Compiler, which the company describes as the only unified exploration-to-signoff platform for multi-die and package co-design, aimed at putting multiple dies in one package.

The Custom Design Family handles transistor-level design of analog, mixed analog-and-digital and custom-digital circuits, with layout automation, circuit simulation, reliability-aware verification and integrated parasitic extraction and physical verification. It includes Custom Compiler as layout and schematic editor, StarRC, IC Validator, and the PrimeSim simulation family, covering PrimeSim SPICE, PrimeSimPro, PrimeSim HSPICE and PrimeSimXA, with the PrimeWave design environment for analysis across them.

The Silicon Lifecycle Management family works on silicon health and operational metrics across a device's life, built on in-chip observability, analytics and automation. It includes Yield Explorer for product ramp analytics, Silicon.da for AI-driven test and production analytics, TestMAX ALE for data extraction into the lifecycle database, and PVT IP for in-chip monitoring and sensing.

On field programmable gate arrays, which are chips that can be customised or programmed after manufacture, the Synplify synthesis tools convert a high-level hardware description language design into an FPGA netlist.

The Ansys portfolio is the simulation and analysis half of the segment, used across high-tech, aerospace and defence, automotive, energy, industrial equipment, materials and chemicals, consumer products, healthcare and construction, and in academia. The Other group holds university programs, mechatronic simulation, the effect of foreign currency hedges, and the Optical Solutions Group.

Design IP

Design IP are pre-designed circuits an engineer uses as components of a larger chip design. The portfolio covers pre-verified, silicon-proven blocks for interfaces including UCIe, UALink, HBM, CXL, USB, PCI Express, DDR and LPDDR, Ethernet, Ultra Ethernet, MIPI and HDMI; logic libraries and embedded memories, including memory compilers, non-volatile memory and standard cells with integrated test and repair; processor solutions, including configurable ARC processors, neural network processors and digital processor cores; security blocks, including cryptographic cores and software, security subsystems and secured interface IP; automotive blocks built to functional safety and cybersecurity standards including ISO 26262 and ISO 21434; and system-on-chip infrastructure, datapath and building block IP, mathematical and floating-point components, Arm AMBA interconnect fabric and peripherals, and verification IP.

The IP Accelerated initiative adds architecture design support, customised subsystems, waveform and power integrity analysis, and IP hardening on top of that portfolio. The filing says the portfolio is optimised for AI and data centre, automotive, edge AI, digital home, internet of things and mobile markets.

Who buys it and how it reaches them

The EDA and Design IP customers are primarily semiconductor and electronics systems companies, while the simulation and analysis customers span a broader set of industries. Products and services are marketed through direct sales in the United States and the principal foreign markets, and certain products, including the simulation and analysis software, go through a global network of independent channel partners. Outside the United States there are sales, support or service offices in Canada, multiple countries in Europe, Israel and across Asia, including Japan, China, Korea, India and Taiwan.

From Synopsys's annual report on Form 10-K for the year ended 31 October 2025. The filing

Written from the 10-K filed 22 December 2025: read the full 10-K.