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Cadence Design Systems (CDNS) FY2025 results: revenue $5.3 billion, up 14.1% on the year

Cadence Design Systems Inc. (CDNS) reported revenue of $5.3 billion for fiscal 2025, the year ended 31 December 2025, up 14.1% on the year before. Net income was $1.1 billion, up 5.1%, and diluted earnings per share $4.06. The figures are the company's own, from the 10-K it filed with the SEC on 19 February 2026.

Revenue
$5.3 billion
+14.1% on the year
FY2018FY2025
Operating margin
28.2%
29.1% a year earlier
FY2018FY2025
Net income
$1.1 billion
+5.1% on the year
FY2018FY2025
Diluted EPS
$4.06
+5.5% on the year
FY2018FY2025

this yearthe year beforeHover a bar for its figure.

The year in brief

What management said about the year

Guidance figures: 22 new.

  • Revenue rose 14% to $5.297 billion: Fiscal 2025 revenue was $5.297 billion, up from $4.641 billion; fourth-quarter revenue was $1.440 billion, up from $1.356 billion.
  • Non-GAAP EPS up 20% to $7.14: Non-GAAP diluted EPS for 2025 was $7.14, up from $5.97 in 2024. GAAP diluted EPS was $4.06, against $3.85.
  • IP grew nearly 25% in 2025: The IP business grew nearly 25% in 2025, driven by performance and adoption across HBM, UCIe, PCIe, DDR and SerDes.
  • Hardware added over 30 new customers: Hardware had another record year, adding more than 30 new customers. Seven of the top ten customers bought both Palladium Z3 and Protium X3.
  • Record backlog of $7.8 billion: Year-end backlog was $7.8 billion, up from $6.8 billion a year earlier.
Read the Q4 FY2025 earnings call summary

From this 10-K

Cadence develops computational, AI-driven software, accelerated hardware and silicon intellectual property products. Its customers are semiconductor companies that design and manufacture integrated circuits, and systems companies that design and manufacture electromechanical systems containing semiconductors and other electronics. The offerings sit in three product categories: Core EDA, Semiconductor IP, and System Design and Analysis. The company calls its approach Intelligent System Design, which extends its reach beyond chip design into full electromechanical systems.

Cadence Design Systems Inc., the 10-K for 2025

Cadence develops computational, AI-driven software, accelerated hardware and silicon intellectual property products. Its customers are semiconductor companies that design and manufacture integrated circuits, and systems companies that design and manufacture electromechanical systems containing semiconductors and other electronics. The offerings sit in three product categories: Core EDA, Semiconductor IP, and System Design and Analysis. The company calls its approach Intelligent System Design, which extends its reach beyond chip design into full electromechanical systems.

Core EDA

These products design and verify semiconductor chips, including analog, digital, mixed analog-and-digital, memory, radio-frequency and silicon photonics, used across automotive, aerospace and defence, consumer electronics, data centres, industrial, medical and mobile markets.

Virtuoso is the platform for designing and verifying analog, custom, radio-frequency, mixed analog-and-digital, memory and photonics devices, with simulation and analysis alongside physical verification and signoff flows including design rule checking and layout-versus-schematic verification. Innovus is the platform for designing and verifying large digital integrated circuits, with physical verification and signoff covering design rule checking, layout-versus-schematic, static timing analysis and power analysis.

Functional verification checks that a chip's functional description matches its physical implementation, repeated through the design cycle. Two software products do it, the Jasper Formal Verification Platform and the Xcelium Parallel Logic Simulation Platform, with Verisium as the generative AI product across the verification flow. For high-performance chips such as microprocessors, graphics processing units and AI processors, the Palladium Enterprise Emulation Platform and the Protium field programmable gate array prototyping platforms cut the time large-scale functional tests take, allowing early bug detection and hardware and software co-verification.

Two fiscal 2025 acquisitions sit here. One brought agentic AI technology built for semiconductor development, covering intelligent test planning, automated test generation and AI-assisted debugging, now integrated with the Xcelium simulator, the Jasper platform and other front-end verification technologies. The other, VLAB Works, brought virtual prototyping, including a virtual development environment and a catalogue of virtual model components, aimed at embedded software development for automotive manufacturers, tier one suppliers and semiconductor companies.

Semiconductor IP

These are design architectures a customer integrates into its own design blocks, system-on-chip subsystems and chiplets, embedded in chips used in automotive, hyperscale, mobile computing and consumer products including mobile phones and AI chips. The portfolio holds controllers and physical interfaces for computing, networking and embedded systems, spanning PCI Express, Universal Accelerator Link, Compute Express Link and memory interfaces including High Bandwidth Memory and Graphics Double Data Rate. Tensilica configurable digital processors provide subsystems for AI, audio and voice, baseband, and vision and imaging.

System Design and Analysis

This platform handles system-level design and verification across chips, packages, printed circuit boards and complete electronic systems, integrating thermal, electromagnetic and waveform and power integrity simulation with computational fluid dynamics. The products are Allegro X and OrCAD X for boards and advanced packaging, Sigrity X for waveform and power integrity, AWR for radio-frequency design, Fidelity for computational fluid dynamics, Celsius for thermal and airflow analysis, Clarity 3D Solver for electromagnetic and power electronics, and Integrity 3D-IC for 3D and multi-chiplet designs. OrCAD is aimed at mainstream board customers and is marketed mainly through a network of resellers; Allegro X AI is the generative AI product for board design.

How it is sold and made

Software is licensed mainly on time-based licences, generally running two to three years, giving the customer everything delivered at the outset plus updates through the term with no rights of return, and some arrangements let the customer remix among those products and take unspecified additional products released during the term. A small portion goes out on perpetual licences, which carry no right to new technology. Hardware is either sold or leased, and emulation hardware can also be reached remotely through a Cadence-managed cloud arrangement. Cadence licenses its design IP under nonexclusive agreements giving usage rights for specific designs, and on certain of them it collects royalties as the customer ships.

Selling runs through a direct sales force of salespeople and applications engineers, who handle technical pre-sales and post-sales support, and the filing notes the sales cycle is generally long, up to six months or more. All the hardware, including printed circuit boards, custom integrated circuits and prototyping components, is manufactured, assembled and tested by subcontractors, and software and documentation go out by secure electronic delivery.

From Cadence Design Systems' annual report on Form 10-K for the year ended 31 December 2025. The filing

Written from the 10-K filed 19 February 2026: read the full 10-K.

The four quarters: Q1 FY2025 · Q2 FY2025 · Q3 FY2025 · Q4 FY2025

Income statement (profit and loss)

$ millionFY2025FY2024FY2023On the yearLast 8 years
Revenue5,2974,6414,090+14.1%
Operating income1,4921,3511,251+10.5%
Operating margin28.2%29.1%30.6%
Interest expense11776.036.2+53.3%
Pre-tax income1,5221,3961,282+9.0%
Income tax413340241+21.4%
Effective tax rate27.1%24.4%18.8%
Net income1,1091,0551,041+5.1%
Net margin20.9%22.7%25.5%
Diluted EPS$4.06$3.85$3.82+5.5%
$ million except per share.
Read moreFree cash flow is operating cash flow less capital expenditure; the effective tax rate is income tax over pre-tax income; margins are the line over revenue. Gross profit is revenue less cost of revenue, and operating income is revenue less the company's own total costs, where the statement does not print those lines. Those four are arithmetic on the filed numbers; everything else is as filed. Money is in $ million as the company files it, or in $ billion by the switch above the tables; per share figures and share counts are as they are.

Cash flow

$ millionFY2025FY2024FY2023On the yearLast 8 years
Operating cash flow1,7291,2611,349+37.1%
Capital expenditure142143102-0.5%
Free cash flow1,5871,1181,247+41.9%
Free cash flow margin30.0%24.1%30.5%
Cash from investing-461-837-412
Cash from financing-9491,239-804
Depreciation and amortisation228197145+15.7%
Share-based compensation455391326+16.3%
Buybacks925550700+68.2%
Diluted shares, weighted273m274m273m-0.2%
Shares outstanding at period end272m274m272m-0.7%

Balance sheet

$ millionFY2025FY2024FY2023On the yearLast 8 years
Shareholders' equity5,4744,6743,404+17.1%
Debt2,4802,476649+0.2%
Operating lease liabilities136109115+25.2%
Other liabilities2,0631,7161,501+20.2%
Total liabilities and equity10,1538,9745,669+13.1%
Fixed assets517458403+12.8%
Goodwill2,7492,3791,536+15.6%
Intangible assets718595337+20.8%
Investments222265130-16.2%
Cash and equivalents3,0012,6441,008+13.5%
Receivables945680489+38.9%
Inventory304258182+17.8%
Other assets1,6971,6961,584+0.1%
Total assets10,1538,9745,669+13.1%

10-K for the year ended 31 December 2025, filed 19 February 2026: the filing.